Multi-bit flip-flops (also referred to as flop-trays) are large cells that realize the functionality of multiple flip-flops within one cell, with multiple data inputs and outputs but with a single clock. By sharing common resources (common clock and scan circuitry), flop-trays provide more power and area efficiency. However, their large size and high dynamic current draw (especially when most bits are flipping) are a detriment to the cell placement/routing as well as demands of a dynamic IR budget on the power supply grid.
Accordingly, there are long-felt industry needs for methods that improve upon conventional methods including the improved methods and apparatus provided hereby.
The inventive features that are characteristic of the teachings, together with further features and advantages, are better understood from the detailed description and the accompanying figures. Each of the figures is provided for the purpose of illustration and description only, and does not limit the present teachings.